MIMO In-Band-Full-Duplex PLC: Design, A...

In-band full-duplex (IBFD) is an attractive solution for increasing the throughput of PowerLine Communication (PLC) systems. In IBFD, each network node is allowed to transmit and receivesimultaneously in the same frequency band. This paper discusses the importance of defining figures ofmerit to analyze IBFD performance, which is often forgotten by the literature that addresses IBFD from apure system level and signal processing perspective. This is because in IBFD hardware-related aspects areof great importance. The focus is then given to the first self-interference (SI) cancellation stage, namelythe analog coupling and self-interference cancellation stage (ASICS). Two architectures are considered. Adetailed analysis is offered by taking into account circuit-level aspects. A broadband multiple conductorPLC scenario is assumed to enable multiple-input multiple-output (MIMO) IBFD communication. The firstconsidered architecture performs SI subtraction exploiting operational amplifiers. The second proposedarchitecture exploits the characteristics of a three ports magnetic circuit together with a signal generatorto remove the SI. Design, analysis, and hardware realization of these circuits have been done to compareand show the practical feasibility of the ASICS for PLC, well known to be challenged by its lineimpedance matching problems and severe frequency selective channel characteristics. This paper is thefirst documented contribution of the IBFD ASICS for 2x2 MIMO broadband PLC physically realized andtested in the field.